N. AT Et Al. , "A low-area unified hardware architecture for the AES and the cryptographic hash function Grostl," JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING , vol.106, pp.106-120, 2017
AT, N. Et Al. 2017. A low-area unified hardware architecture for the AES and the cryptographic hash function Grostl. JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING , vol.106 , 106-120.
AT, N., Beuchat, J., Okamoto, E., SAN, İ., & Yamazaki, T., (2017). A low-area unified hardware architecture for the AES and the cryptographic hash function Grostl. JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING , vol.106, 106-120.
AT, NURAY Et Al. "A low-area unified hardware architecture for the AES and the cryptographic hash function Grostl," JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING , vol.106, 106-120, 2017
AT, NURAY Et Al. "A low-area unified hardware architecture for the AES and the cryptographic hash function Grostl." JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING , vol.106, pp.106-120, 2017
AT, N. Et Al. (2017) . "A low-area unified hardware architecture for the AES and the cryptographic hash function Grostl." JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING , vol.106, pp.106-120.
@article{article, author={NURAY AT Et Al. }, title={A low-area unified hardware architecture for the AES and the cryptographic hash function Grostl}, journal={JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING}, year=2017, pages={106-120} }