IFAC Proceedings Volumes (IFAC-PapersOnline), vol.16, pp.30-35, 2005 (Scopus)
in this paper, the implementation of an H∞ controller, designed in another work for the flow control in communication networks with a single bottleneck, is considered for asynchronous transfer mode (ATM) networks with multiple bottlenecks. The controller calculates the data sending rates by using the information about the queue lengths at the switches. To observe the performance of the system in real ATM networks, a number of simulations are realised for certain realistic cases and the results are presented. Copyright © 2005 IFAC.