Paillier cryptosystem is extensively utilized as a homomorphic encryption scheme to ensure privacy requirements in many privacy-preserving data mining schemes. However, overall performance of the applications employing Paillier cryptosystem intrinsically degrades because of modular multiplications and exponentiation operations performed by the cryptosystem. In this study, we investigate how to tackle with such performance degradation because of Paillier cryptosystem. We first exploit parallelism among the operations in the cryptosystem and interleaving among independent operations. Then, we develop hardware realization of our scheme using field-programmable gate arrays. As a case study, we evaluate our cryptoprocessor for a well-known privacy-preserving set intersection protocol. We demonstrate how the proposed cryptoprocessor responds promising performance for hard real-time privacy-preserving data mining applications. Copyright (c) 2016 John Wiley & Sons, Ltd.